1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to a deposition process for forming metal lines in a time efficient and reliable manner.
2. Description of the Related Art
Semiconductor devices, such as semiconductor memories, processors, application specific integrated circuits and the like, include layers of conductive lines used to interconnect components on the devices. Conductive or metal lines are often formed on upper levels of a semiconductor device. These metal lines are typically connected by contacts through vias to underlying devices or other metal lines.
In a conventional method, an Aluminum (Al) metal line deposition includes a two step process. This process is characterized by a cold-hot process. This process is extremely slow having a throughput of only about 22 wafers per hour for a two physical vapor deposition Al chamber mainframe. The process includes two depositions (cold and hot). The first (cold) deposition suffers from the disadvantage of running unchucked. This means that there is no possibility to check whether the wafer is sitting correctly on a chuck which secures the wafer in a processing chamber. If the wafer is not placed correctly on the chuck, the chuck could get deposited on and ruined. This is disadvantageous since an electrostatic chuck can cost about $80,000.
Another problem with the conventional method is the heat up time needed in between the two Al depositions. After the cold Al deposition, the wafer is heated. During that time, a thin Al.sub.3 O.sub.2 layer may be formed on the previously deposited Al. This decreases the via filling properties.
The cold-hot process sequence may be employed as a so-called sprint approach. This means that a via has to get filled and concurrently a planar Al film has to get deposited. The planar Al film is then etched for structuring metal lines.
The requirements for the Al deposition include the following:
1. vias formed in a dielectric (oxide) layer which are typically tapered must get filled reliably; PA1 2. a planar (low topography) Al film must be formed on top of the dielectric layer; and PA1 3. a temperature budget for semiconductor processing must be maintained (i.e., little or no influence on sub lying metal lines).
To achieve this, the two step Al deposition process was developed. The two step process begins with a cold step which uses high sputter power and runs at low temperatures. This ensures that the vias are getting filled (i.e., small Al grains and no overhangs at the top edge of the vias), and that no voids are formed. Before the second (hot) Al deposition step starts, the wafer temperature gets increased up to 350.degree. C. This second Al deposition process runs at low power to ensure that the Al film gets planarized during deposition. This Al deposition sequence is not a reflow process. Reflow processes typically run at much higher temperatures and were developed for filling more aggressive (higher aspect ratio) via structures. The hot Al deposition process deposition therefore has to fulfill different requirements and is optimized for tapered via fill and planar Al deposition on top of a dielectric layer, as described.
As mentioned above, the conventional two-step deposition process is very slow (e.g., a 192 second process time, and 11/22 wafers/hour for a one/two chamber system). Due to the relatively long Al deposition time of 192 seconds, a small amount of TiAl.sub.3 forms which increases contact resistance and decreases the electromigration lifetime.
Therefore, a need exists for a deposition process which increases throughput without sacrificing performance and reliability.